available options

• overlay memory
• 256k, 1 mb or 4 mb
• 256k frame trace buffer

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motorola 68360/68en360/68mh360

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the powerpack?68en360 in-circuit-emulator is a full-featured emulator that provides real-time, transparent emulation at the full processor speed. it has up to 2 mb of optional overlay memory for easy mapping of target rom code and data ram, either as sram or dram, with or without parity enabled. it supports the 33 mhz 68360 or 68en360 at zero wait states.

source level debug support and full emulator control are provided by the powerpack sld interface, which provides a split-view source window, browsing to any module and function, setting breakpoints on individual statements, double-clicking on a variable to add to the variable watch window, and mixed source/assembly view of executable code.

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open a new browser window to see a short sld demo.

system features

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• 33 mhz, zero wait state operation
• automatic configuration for 3.3v or 5.0v ?no jumpers
• complete non-intrusive design ?uses no target address space, runs full speed with zero wait states
• overlay memory supporting standard as well as dram target memory configurations; parity; dynamic bus sizing
• integrated "c" source-level debug in an interface supported on microsoft windows 3.1, 3.11, 95, 98, and nt
• peripheral window for viewing and editing of all internal registers
• conversion of chip selects into logical upper addresses for simple setup of overlay and triggering
• long, flexible emulator-to-pod cables and small profile probe head, making target connection easy
• 256k frame trace buffer
• 8 event recognizers
• 4-level sequential triggering
• timestamp with clock-cycle resolution
• trace dequeuer showing only executed instructions
• cursor link from trace window to source window showing source code aligned with disassembled trace
• ability to view or modify target memory while emulator is running
• ability to view or edit all on-chip peripherals in symbolic form.
• break-out connector on probe head for port b and c signals, providing easy access for logic analyzer or oscilloscope
• target board with 128 kb of zero wait state sram, to support software development and testing prior to target availability

available option

• 2 mb of overlay memory

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powerscope bdm debugger

as motorola 683xx products go through die shrinks they are designed to meet the new 3v standard. the 3v/5v auto-sense bdm source level debugger supports the 3v 68l331/332, 68340 and 68360.

system features

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• connection via 10-pin bdm connector
• integrated c source-level debug in a microsoft windows interface
• source window
• variable window
• stack window
• multiple memory windows
• cpu register window

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